S9S12XS256J0CAL Datasheet, PDF (84/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
1 _{Read: Always reads 0x00}
Write: Unimplemented
2.3.16 Port K Data Register (PORTK)
Address 0x0032 (PRR)
7
6
5
4
3
2
R
0
PK7
PK5
PK4
PK3
PK2
W
Reset
0
0
0
0
0
0
Figure 2-14. Port K Data Register (PORTK)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
PK1
PK0
0
0
Field
7,5-0
PK
Table 2-14. PORTK Register Field Descriptions
Description
Port K general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.17 Port K Data Direction Register (DDRK)
Address 0x0033 (PRR)
7
6
5
4
3
2
R
0
DDRK7
DDRK5
DDRK4
DDRK3
DDRK2
W
Reset
0
0
0
0
0
0
Figure 2-15. Port K Data Direction Register (DDRK)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
DDRK1
DDRK0
0
0
S12XS Family Reference Manual, Rev. 1.13
84
Freescale Semiconductor