S9S12XS256J0CAL Datasheet, PDF (78/738 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port Integration Module (S12XSPIMV1)
Table 2-8. PORTE Register Field Descriptions
Field
7
PE
Description
Port E general purpose input/output data—Data Register, ECLKX2 output, XCLKS input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The ECLKX2 output function takes precedence over the general purpose I/O function if enabled.
• The external clock selection feature (XCLKS) is only active during RESET=0
6-5, 3-2
PE
Port E general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
4
Port E general purpose input/output data—Data Register, ECLK output
PE When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The ECLK output function takes precedence over the general purpose I/O function if enabled.
1
Port E general purpose input data and interrupt—Data Register, IRQ input.
PE This pin can be used as general purpose and IRQ input.
0
Port E general purpose input data and interrupt—Data Register, XIRQ input.
PE This pin can be used as general purpose and XIRQ input.
2.3.9 Port E Data Direction Register (DDRE)
Address 0x0009 (PRR)
7
R
DDRE7
W
6
DDRE6
5
DDRE5
4
DDRE4
3
DDRE3
2
DDRE2
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-7. Port E Data Direction Register (DDRE)
1 _{Read: Anytime, the data source depends on the data direction value}
Write: Anytime
Access: User read/write¹
1
0
0
0
0
0
S12XS Family Reference Manual, Rev. 1.13
78
Freescale Semiconductor