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S912XEG128J2MAA Datasheet, PDF (88/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 1 Device Overview MC9S12XE-Family
1.13 Oscillator Conï¬guration
The XCLKS is an input signal which controls whether a crystal in combination with the internal loop
controlled (low power) Pierce oscillator is used or whether full swing Pierce oscillator/external clock
circuitry is used. For this device XCLKS is mapped to PE7.
The XCLKS signal selects the oscillator conï¬guration during reset low phase while a clock quality check
is ongoing. This is the case for:
⢠Power on reset or low-voltage reset
⢠Clock monitor reset
⢠Any reset while in self-clock mode or full stop mode
The selected oscillator conï¬guration is frozen with the rising edge of the RESET pin in any of these above
described reset cases.
EXTAL
MCU
C1
Crystal or
Ceramic Resonator
XTAL
C2
VSSPLL
Figure 1-10. Loop Controlled Pierce Oscillator Connections (XCLKS = 1)
EXTAL
MCU
XTAL
RB
RS
C1
Crystal or
Ceramic Resonator
RB=1Mâ¦
;
RS
speciï¬ed
by
crystal
C2
vendor
VSSPLL
Figure 1-11. Full Swing Pierce Oscillator Connections (XCLKS = 0)
EXTAL
MCU
XTAL
CMOS-Compatible
External Oscillator
Not Connected
Figure 1-12. External Clock Connections (XCLKS = 0)
MC9S12XE-Family Reference Manual Rev. 1.25
88
Freescale Semiconductor
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