S912XEG128J2MAA Datasheet, PDF (581/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
15.3 Memory Map and Register Definition
This section provides a detailed description of all memory and registers for the IIC module.
15.3.1 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
0x0000
IBAD
Bit 7
R
ADR7
W
6
ADR6
5
ADR5
4
ADR4
3
ADR3
2
ADR2
0x0001
IBFD
R
IBC7
W
IBC6
IBC5
IBC4
IBC3
IBC2
0x0002
IBCR
R
IBEN
W
0
IBIE
MS/SL
Tx/Rx
TXAK
RSTA
0x0003
R TCF
IAAS
IBB
0
SRW
IBSR
W
IBAL
0x0004
R
IBDR
D7
W
D6
D5
D4
D3
D2
0x0005
IBCR2
R
GCEN
W
0
0
ADTYPE
= Unimplemented or Reserved
0
ADR10
Figure 15-2. IIC Register Summary
15.3.1.1 IIC Address Register (IBAD)
Module Base +0x0000
R
W
Reset
7
ADR7
0
6
ADR6
5
ADR5
4
ADR4
3
ADR3
2
ADR2
0
0
0
0
0
= Unimplemented or Reserved
Figure 15-3. IIC Bus Address Register (IBAD)
Read and write anytime
1
ADR1
IBC1
0
IBIF
D1
ADR9
1
ADR1
0
Bit 0
0
IBC0
IBSWAI
RXAK
D0
ADR8
0
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
581