S912XEG128J2MAA Datasheet, PDF (1239/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

A.6.3 Phase Locked Loop
Appendix A Electrical Characteristics
A.6.3.1 Jitter Information
With each transition of the clock f_cmp, the deviation from the reference clock f_ref is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the clock output frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in Figure A-5.
0
1
2
3
N-1
N
t_min1
t_nom
t_max1
t_minN
t_maxN
Figure A-5. Jitter Definitions
The relative deviation of t_nom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1239