S912XEG128J2MAA Datasheet, PDF (42/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview MC9S12XE-Family
This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal
properties, and detailed discussion of signals. It is built from the signal description sections of the Block
User Guides of the individual IP blocks on the device.
1.2.1 Device Pinout
The MC9S12XE-Family offers pin-compatible packaged devices to assist with system development and
accommodate expansion of the application.
NOTE
Smaller derivatives within the MC9S12XE-Family feature a subset of the
listed modules. Refer to Appendix D Derivative Differences for more
information about derivative device module subset and to Table 1-7. Port
Availability by Package Option and Table 1-9. Pin-Out Summary for
details of pins available in different package options.
The MC9S12XE-Family devices are offered in the following package options:
• 208-pin MAPBGA package with an external bus interface (address/data bus)
• 144-pin LQFP package with an external bus interface (address/data bus)
• 112-pin LQFP without external bus interface
• 80-pin QFP without external bus interface
MC9S12XE-Family Reference Manual Rev. 1.25
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Freescale Semiconductor