S912XEG128J2MAA Datasheet, PDF (509/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
Table 13-3. Multi-Channel Wrap Around Coding
WRAP3 WRAP2 WRAP1 WRAP0
Multiple Channel Conversions (MULT = 1)
Wraparound to AN0 after Converting
0
0
0
1
AN1
0
0
1
0
AN2
0
0
1
1
AN3
0
1
0
0
AN4
0
1
0
1
AN5
0
1
1
0
AN6
0
1
1
1
AN7
1
0
0
0
AN8
1
0
0
1
AN9
1
0
1
0
1
0
1
1
1
1
0
0
AN10
AN11
AN12
1
1
0
1
1
1
1
0
1
1
1
1
1. If only AN0 should be converted use MULT=0.
AN13
AN14
AN15
13.3.2.2 ATD Control Register 1 (ATDCTL1)
Writes to this register will abort current conversion sequence.
Module Base + 0x0001
7
R
ETRIGSEL
W
Reset
0
Read: Anytime
Write: Anytime
6
SRES1
5
SRES0
4
3
2
1
0
SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
0
1
0
1
1
1
1
Figure 13-4. ATD Control Register 1 (ATDCTL1)
Table 13-4. ATDCTL1 Field Descriptions
Field
Description
7
ETRIGSEL
6–5
SRES[1:0]
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-
0 inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
not effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in Table 13-6.
A/D Resolution Select — These bits select the resolution of A/D conversion results. See Table 13-5 for
coding.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
509