S912XEG128J2MAA Datasheet, PDF (230/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1 _{Register Descriptions}
This section describes in address order all the MPU module registers and their individual bits.
Register
Name
Bit 7
6
5
4
3
2
1
0x0000
R
WPF
NEXF
0
0
0
0
MPUFLG
AEF
W
Bit 0
SVSF
0x0001
R
0
MPUASTAT0 _W
ADDR[22:16]
0x0002
R
MPUASTAT1 _W
ADDR[15:8]
0x0003
R
MPUASTAT2 _W
ADDR[7:0]
0x0004
R
0
0
0
0
0
0
0
0
Reserved
W
0x0005
R
0
0
0
0
MPUSEL
SVSEN
W
SEL[2:0]
0x0006
R
MPUDESC0⁽¹⁾
MSTR0
W
MSTR1
MSTR2
MSTR3
LOW_ADDR[22:19]
0x0007
R
MPUDESC1¹ _W
LOW_ADDR[18:11]
0x0008
R
MPUDESC2¹ _W
LOW_ADDR[10:3]
0x0009
R
0
0
MPUDESC3¹ _W
WP
NEX
HIGH_ADDR[22:19]
0x000A
R
MPUDESC4¹ _W
HIGH_ADDR[18:11]
0x000B
R
MPUDESC5¹ _W
HIGH_ADDR[10:3]
= Unimplemented or Reserved
1. The module addresses 0x0006−0x000B represent a window in the register map through which different descriptor registers
are visible.
Figure 4-2. MPU Register Summary
MC9S12XE-Family Reference Manual Rev. 1.25
230
Freescale Semiconductor