S912XEG128J2MAA Datasheet, PDF (1248/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
Table A-30. Example 1a: Normal Expanded Mode Timing 50 MHz bus (EWAIT disabled)
No.
Characteristic
Symbol
- Frequency of internal bus
f_i
- Internal cycle time
t_cyc
- Frequency of external bus
f_o
1 External cycle time (selected by EXSTR)
2 Address ⁽¹⁾ valid to RE fall
t_cyce
t_ADRE
3 Pulse width, RE
PW_RE
4 Address valid to WE fall
t_ADWE
5 Pulse width, WE
PW_WE
6 Read data setup time (if ITHRS = 0)
t_DSR
Read data setup time (if ITHRS = 1)
t_DSR
7 Read data hold time
t_DHR
8 Read enable access time
t_ACCR
9 Write data valid to WE fall
t_WDWE
10 Write data setup time
t_DSW
11 Write data hold time
t_DHW
1. Includes the following signals: ADDRx, UDS, LDS, and CSx.
V_DD5=5.0V
C Min Max
- D.C. 50.0
- 20 ∞
- D.C. 25.0
- 40 ∞
D4
-
D 28
-
D4
-
D 18
-
D 19
-
D 23
-
D0
-
D4
-
D5
-
D 23
-
D6
-
V_DD5=3.3V
C Min Max
- D.C. 25.0
- 40 ∞
- D.C. 12.5
- 80 ∞
D 13
-
D 58
-
D 15
-
D 38
-
D 38
-
D
N/A
D0
-
D4
-
D5
-
D 43
-
D4
-
Unit
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1248
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor