S912XEG128J2MAA Datasheet, PDF (201/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 3 Memory Mapping Control (S12XMMCV4)
3.3.2.6 Program Page Index Register (PPAGE)
Address: 0x0015
R
W
Reset
7
PIX7
1
6
PIX6
5
PIX5
4
PIX4
3
PIX3
2
PIX2
1
1
1
1
1
Figure 3-11. Program Page Index Register (PPAGE)
1
PIX1
1
0
PIX0
0
Read: Anytime
Write: Anytime
These eight index bits are used to page 16 KByte blocks into the Flash page window located in the local
(CPU or BDM) memory map from address 0x8000 to address 0xBFFF (see Figure 3-12). This supports
accessing up to 4 Mbytes of Flash (in the Global map) within the 64 KByte Local map. The PPAGE register
is effectively used to construct paged Flash addresses in the Local map format. The CPU has special access
to read and write this register directly during execution of CALL and RTC instructions..
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Global Address [22:0]
1 Bit21
Bit14 Bit13
Bit0
PPAGE Register [7:0]
Address [13:0]
Address: CPU Local Address
or BDM Local Address
Figure 3-12. PPAGE Address Mapping
NOTE
Writes to this register using the special access of the CALL and RTC
instructions will be complete before the end of the instruction execution.
Field
7–0
PIX[7:0]
Table 3-13. PPAGE Field Descriptions
Description
Program Page Index Bits 7–0 — These page index bits are used to select which of the 256 FLASH or ROM
array pages is to be accessed in the Program Page Window.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
201