S912XEG128J2MAA Datasheet, PDF (132/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (S12XEPIMV1)
1. Read: Anytime.
Write:Never, writes to this register have no effect.
Field
7-0
PTIM
Table 2-34. PTIM Register Field Descriptions
Description
Port M input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
2.3.39 Port M Data Direction Register (DDRM)
Address 0x0252
R
W
Reset
7
DDRM7
0
1. Read: Anytime.
Write: Anytime.
6
DDRM6
5
DDRM5
4
DDRM4
3
DDRM3
2
DDRM2
0
0
0
0
0
Figure 2-37. Port M Data Direction Register (DDRM)
Access: User read/write⁽¹⁾
1
0
DDRM1
DDRM0
0
0
Table 2-35. DDRM Register Field Descriptions
Field
Description
7
DDRM
6
DDRM
5
DDRM
Port M data direction—
This register controls the data direction of pin 7.
The enabled CAN3, routed CAN4, or routed SCI3 forces the I/O state to be an output. In those cases the data
direction bits will not change. The DDRM bits revert to controlling the I/O direction of a pin when the associated
peripheral module is disabled.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port M data direction—
This register controls the data direction of pin 6.
The enabled CAN3, routed CAN4, or routed SCI3 forces the I/O state to be an input. In those cases the data direction
bits will not change. The DDRM bits revert to controlling the I/O direction of a pin when the associated peripheral
module is disabled.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port M data direction—
This register controls the data direction of pin 5.
The enabled CAN2, routed CAN0, or routed CAN4 forces the I/O state to be an output. Depending on the
configuration of the enabled routed SPI0 this pin will be forced to be input or output. In those cases the data direction
bits will not change. The DDRM bits revert to controlling the I/O direction of a pin when the associated peripheral
module is disabled.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
MC9S12XE-Family Reference Manual Rev. 1.25
132
Freescale Semiconductor