S912XEG128J2MAA Datasheet, PDF (356/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10 XGATE (S12XGATEV3)
10.2 External Signal Description
The XGATE module has no external pins.
10.3 Memory Map and Register Definition
This section provides a detailed description of address space and registers used by the XGATE module.
The memory map for the XGATE module is given below in Figure 10-2.The address listed for each register
is the sum of a base address and an address offset. The base address is defined at the SoC level and the
address offset is defined at the module level. Reserved registers read zero. Write accesses to the reserved
registers have no effect.
10.3.1 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bits and field functions follow the register
diagrams, in bit order.
Register
Name
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x0000 R 0 0 0 0 0 0 0 0
0
XGMCTL
W ^XGEM
XG
FRZM
XG
DBGM
XGSSM
XG
FACTM
XG
SWEFM
XGIEM
XGE
XGFRZ XGDBG XGSS
XG
FACT
XG
SWEF
XGIE
0x0002 R
XGCHID _W
0
XGCHID[6:0]
0x0003 R
XGCHPL _W
00000
XGCHPL[2:0]
0x0004 R
Reserved _W
0x0005 R
XGISPSEL _W
000000
XGISPSEL[1:0]
0x0006 R
0
XGISP74 _W
XGISP74[15:1]
0x0006 R
0
XGISP31 _W
XGISP31[15:1]
0x0006 R
0
XGVBR _W
XGVBR[15:1]
= Unimplemented or Reserved
Figure 10-2. XGATE Register Summary (Sheet 1 of 3)
MC9S12XE-Family Reference Manual Rev. 1.25
356
Freescale Semiconductor