S912XEG128J2MAA Datasheet, PDF (167/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (S12XEPIMV1)
Table 2-86. PPSR Register Field Descriptions
Field
7-0
PPSR
Description
Port R pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
2.3.91 PIM Reserved Register
Address 0x036E
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
1. Read: Always reads 0x00
Write: Unimplemented
Figure 2-89. PIM Reserved Register
Access: User read⁽¹⁾
1
0
0
0
0
0
2.3.92 Port R Routing Register (PTRRR)
Address 0x036F
R
W
Reset
7
PTRRR7
0
1. Read: Anytime.
Write: Anytime.
6
PTRRR6
5
PTRRR5
4
PTRRR4
3
PTRRR3
2
PTRRR2
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-90. Port R Routing Register (PTRRR)
Table 2-87. PTR Routing Register Field Descriptions
Field
Description
7
PTRRR
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC7 is available on PP7
0 TIMIOC7 is available on PR7
6
PTRRR
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC6 is available on PP6
0 TIMIOC6 is available on PR6
Access: User read/write⁽¹⁾
1
0
PTRRR1 PTRRR0
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
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