S912XEG128J2MAA Datasheet, PDF (178/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (S12XEPIMV1)
This register configures the re-routing of SCI3, IIC0, CS[3:0] on alternative ports.
Table 2-102. Port F Routing Summary
Module
PTFRR
543210
SCI3 0 x x x x x
1xxxxx
IIC0 x 0 x x x x
x1xxxx
CS3 x x 0 x x x
xx1xxx
CS2 x x x 0 x x
xxx1xx
CS1 x x x x 0 x
xxxx1x
CS0 x x x x x 0
xxxxx1
Related Pins
TXD
PM7
PF7
SCL
PJ7
PF5
CS
PJ0
PF3
PJ5
PF2
PJ2
PF1
PJ4
PF0
RXD
PM6
PF6
SDA
PJ6
PF4
2.4 Functional Description
2.4.1 General
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output from the external bus interface module or a peripheral module or an input to the external bus
interface module or a peripheral module.
2.4.2 Registers
A set of configuration registers is common to all ports with exceptions in the expanded bus interface and
ATD ports (Table 2-103). All registers can be written at any time, however a specific configuration might
not become active.
Example 2-1. Selecting a pull-up device
This device does not become active while the port is used as a push-pull output.
MC9S12XE-Family Reference Manual Rev. 1.25
178
Freescale Semiconductor