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S912XEG128J2MAA Datasheet, PDF (221/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 3 Memory Mapping Control (S12XMMCV4)
PRR Name
PORTA
PORTB
DDRA
DDRB
PORTC
PORTD
DDRC
DDRD
PORTE
DDRE
MMCCTL0
MODE
PUCR
RDRIV
EBICTL0
EBICTL1
Reserved
MMCCTL1
ECLKCTL
Reserved
PORTK
DDRK
Table 3-21. PRR Listing
PRR Local Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
0x0012
0x0013
0x001C
0x001D
0x0032
0x0033
PRR Location
PIM
PIM
PIM
PIM
PIM
PIM
PIM
PIM
PIM
PIM
MMC
MMC
PIM
PIM
EBI
EBI
MMC
MMC
PIM
PIM
PIM
PIM
3.5.3 On-Chip ROM Control
The MCU offers two modes to support emulation. In the first mode (called generator) the emulator
provides the data instead of the internal FLASH and traces the CPU actions. In the other mode (called
observer) the internal FLASH provides the data and all internal actions are made visible to the emulator.
3.5.3.1 ROM Control in Single-Chip Modes
In single-chip modes the MCU has no external bus. All memory accesses and program fetches are internal
(see Figure 3-24).
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
221