S912XEG128J2MAA Datasheet, PDF (563/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
14.3.2.30 8-Bit Pulse Accumulators Holding Registers (PA3H–PA0H)
Module Base + 0x0032
R
W
Reset
7
PA3H7
0
6
PA3H6
5
PA3H5
4
PA3H4
0
0
0
= Unimplemented or Reserved
3
PA3H3
0
2
PA3H2
0
1
PA3H1
0
Figure 14-53. 8-Bit Pulse Accumulators Holding Register 3 (PA3H)
0
PA3H0
0
Module Base + 0x0033
R
W
Reset
7
PA2H7
0
6
PA2H6
5
PA2H5
4
PA2H4
0
0
0
= Unimplemented or Reserved
3
PA2H3
0
2
PA2H2
0
1
PA2H1
0
Figure 14-54. 8-Bit Pulse Accumulators Holding Register 2 (PA2H)
0
PA2H0
0
Module Base + 0x0034
R
W
Reset
7
PA1H7
0
6
PA1H6
5
PA1H5
4
PA1H4
0
0
0
= Unimplemented or Reserved
3
PA1H3
0
2
PA1H2
0
1
PA1H1
0
Figure 14-55. 8-Bit Pulse Accumulators Holding Register 1 (PA1H)
0
PA1H0
0
Module Base + 0x0035
R
W
Reset
7
PA0H7
6
PA0H6
5
PA0H5
4
PA0H4
3
PA0H3
2
PA0H2
1
PA0H1
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-56. 8-Bit Pulse Accumulators Holding Register 0 (PA0H)
0
PA0H0
0
Read: Anytime.
Write: Has no effect.
All bits reset to zero.
These registers are used to latch the value of the corresponding pulse accumulator when the related bits in
register ICPAR are enabled (see Section 14.4.1.3, “Pulse Accumulators”).
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
563