S912XEG128J2MAA Datasheet, PDF (266/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Interrupt (S12XINTV2)
6.3.2 Register Descriptions
This section describes in address order all the XINT module registers and their individual bits.
Address
Register
Name
Bit 7
6
0x0121
IVBR
R
W
5
4
3
IVB_ADDR[7:0]7
0x0126 INT_XGPRIO R
0
0
0
0
0
W
0x0127 INT_CFADDR R
0
INT_CFADDR[7:4]
W
0x0128 INT_CFDATA0 R
0
0
0
0
RQST
W
0x0129 INT_CFDATA1 R
0
0
0
0
RQST
W
0x012A INT_CFDATA2 R
0
0
0
0
RQST
W
0x012B INT_CFDATA3 R
0
0
0
0
RQST
W
0x012C INT_CFDATA4 R
0
0
0
0
RQST
W
0x012D INT_CFDATA5 R
0
0
0
0
RQST
W
0x012E INT_CFDATA6 R
0
0
0
0
RQST
W
0x012F INT_CFDATA7 R
0
0
0
0
RQST
W
= Unimplemented or Reserved
Figure 6-2. XINT Register Summary
2
1
Bit 0
XILVL[2:0]
0
0
0
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
MC9S12XE-Family Reference Manual Rev. 1.25
266
Freescale Semiconductor