S912XEG128J2MAA Datasheet, PDF (190/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 3 Memory Mapping Control (S12XMMCV4)
• Expanded modes
Address, data, and control signals are activated in normal expanded and special test modes when
accessing the external bus. Access to internal resources will not cause activity on the external bus.
• Emulation modes
External bus is active to emulate, via an external tool, the normal expanded or the normal single
chip mode.}
3.1.5 Block Diagram
Figure 3-1¹ shows a block diagram of the MMC.
EEEPROM
FLASH
BDM
CPU
XGATE
MMC
Address Decoder & Priority
FLEXRAY
DBG
Target Bus Controller
EBI
RAM
Peripherals
Figure 3-1. MMC Block Diagram
3.2 External Signal Description
The user is advised to refer to the device overview for port configuration and location of external bus
signals. Some pins may not be bonded out in all implementations.
Table 3-3 and Table 3-4 outline the pin names and functions. It also provides a brief description of their
operation.
1. Doted blocks and lines are optional. Please refer to the Device User Guide for their availlibilities.
MC9S12XE-Family Reference Manual Rev. 1.25
190
Freescale Semiconductor