S912XEG128J2MAA Datasheet, PDF (144/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (S12XEPIMV1)
Table 2-49. PTH Register Field Descriptions (continued)
Field
1
PTH
0
PTH
Description
Port H general purpose input/output data—Data Register
Port H pin 1 is associated with the TXD signal of the SCI6 module and the MOSI signal of the routed SPI1.
The routed SPI1 function takes precedence over the SCI6 and the general purpose I/O function if the routed SPI1
module is enabled. The SCI6 function takes precedence over the general purpose I/O function if the SCI6 is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port H general purpose input/output data—Data Register
Port H pin 0 is associated with the RXD signal of the SCI6 module and the MISO signal of the routed SPI1.
The routed SPI1 function takes precedence over the SCI6 and the general purpose I/O function if the routed SPI1
module is enabled. The SCI6 function takes precedence over the general purpose I/O function if the SCI6 is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
2.3.54 Port H Input Register (PTIH)
Address 0x0261
7
R PTIH7
6
PTIH6
5
PTIH5
4
PTIH4
3
PTIH3
2
PTIH2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-52. Port H Input Register (PTIH)
1. Read: Anytime.
Write:Never, writes to this register have no effect.
Access: User read⁽¹⁾
1
PTIH1
0
PTIH0
u
u
Field
7-0
PTIH
Table 2-50. PTIH Register Field Descriptions
Description
Port H input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
2.3.55 Port H Data Direction Register (DDRH)
Address 0x0262
R
W
Reset
7
DDRH7
0
6
DDRH6
5
DDRH5
4
DDRH4
3
DDRH3
2
DDRH2
0
0
0
0
0
Figure 2-53. Port H Data Direction Register (DDRH)
Access: User read/write⁽¹⁾
1
0
DDRH1
DDRH0
0
0
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