S912XEG128J2MAA Datasheet, PDF (1232/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
The standard shipping condition for both the D-Flash and P-Flash memory is erased with security disabled.
However it is recommended that each block or sector is erased before factory programming to ensure that
the full data retention capability is achieved. Data retention time is measured from the last erase operation.
Table A-20. NVM Reliability Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol Min Typ Max Unit
P-Flash Arrays
1 C Data retention at an average junction temperature of T_Javg =
85°C⁽¹⁾ after up to 10,000 program/erase cycles
2 C Data retention at an average junction temperature of T_Javg =
85°C⁽³⁾ after less than 100 program/erase cycles
3 C P-Flash number of program/erase cycles
(-40°C ≤ tj ≤ 150°C)
t_PNVMRET
15
100⁽²⁾
—
Years
t_PNVMRET
20
100²
—
Years
n_PFLPE
10K 100K³ — Cycles
D-Flash Array
4 C Data retention at an average junction temperature of T_Javg =
85°C³ after up to 50,000 program/erase cycles
t_DNVMRET
5
100²
—
Years
5 C Data retention at an average junction temperature of T_Javg =
85°C³ after less than 10,000 program/erase cycles
t_DNVMRET
10
100²
—
Years
6 C Data retention at an average junction temperature of T_Javg =
85°C³ after less than 100 program/erase cycles
t_DNVMRET
20
100²
—
Years
7 C D-Flash number of program/erase cycles (-40°C ≤ tj ≤ 150°C)
n_DFLPE
50K 500K³ — Cycles
Emulated EEPROM
8
C
8D5a°^{tCa 1reatfetenrtisopneact.}
an average junction temperature
program/erase cycles
of
T_Javg
=
t_EENVMRET
5⁴
100²
—
Years
9 C D85a_°tCa ₃reateftnetriolensasttahnanav2e0r%agsepjeucn.cptrioognrtaemm/peerarasetucreycolef _sT.Javg =
t_EENVMRET 10
100²
—
Years
(e.g. after <20,000 cycles / Spec 100,000 cycles)
10 C D85a_°tCa ₃reateftnetriolensasttahnanav0e.2ra%gespjuencc. tpiorongtreammp/eerraatsuerecyocfleTs_Javg =
t_EENVMRET 20
100²
—
Years
(e.g. after < 200 cycles / Spec 100,000 cycles)
11 C EEPROM number of program/erase cycles with a ratio of
EEE_NVM to EEE_RAM = 8 (-40°C ≤ tj ≤ 150°C)
n_EEPE 100K⁽⁴⁾ 1M⁽⁵⁾
— Cycles
12 C EEPROM number of program/erase cycles with a ratio of
EEE_NVM to EEE_RAM = 128 (-40°C ≤ tj ≤ 150°C)
n_EEPE
3M⁴ 30M⁵ — Cycles
13 C EEPROM number of program/erase cycles with a ratio of
EEE_NVM to EEE_RAM = 16384⁽⁶⁾ (-40°C ≤ tj ≤ 150°C)
n_EEPE 325M⁴ 3.2G⁵
— Cycles
1. T_Javg does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
application.
2. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618
3. T_Javg does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
application.
4. This represents the number of writes of updated data words to the EEE_RAM partition. Minimum specification (endurance
and data retention) of the Emulated EEPROM array is based on the minimum specification of the D-Flash array per item 6.
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MC9S12XE-Family Reference Manual Rev. 1.25
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