S912XEG128J2MAA Datasheet, PDF (125/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.29 Port S Data Register (PTS)
Chapter 2 Port Integration Module (S12XEPIMV1)
Address 0x0248
R
W
Altern.
Function
Reset
7
PTS7
SS0
0
1. Read: Anytime.
Write: Anytime.
6
PTST6
5
PTS5
4
PTS4
3
PTS3
2
PTS2
SCK0
0
MOSI0
MISO0
TXD1
RXD1
0
0
0
0
Figure 2-27. Port S Data Register (PTS)
Access: User read/write⁽¹⁾
1
0
PTS1
PTS0
TXD0
0
RXD0
0
Field
7
PTS
6
PTS
5
PTS
4
PTS
3
PTS
2
PTS
Table 2-26. PTS Register Field Descriptions
Description
Port S general purpose input/output data—Data Register
Port S pin 7 is associated with the SS signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S pin 6 is associated with the SCK signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S pin 5 is associated with the MOSI signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S pin 4 is associated with the MISO signal of the SPI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S pin 3 is associated with the TXD signal of the SCI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S bits 2 is associated with the RXD signal of the SCI1 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
125