S912XEG128J2MAA Datasheet, PDF (242/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5 External Bus Interface (S12XEBIV4)
5.1.1 Glossary or Terms
bus clock
expanded modes
single-chip modes
emulation modes
normal modes
special modes
NS
SS
NX
ES
EX
ST
external resource
PRR
PRU
EMULMEM
access source
System Clock. Refer to CRG Block Guide.
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Normal Single-Chip Mode
Normal Expanded Mode
Special Single-Chip Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Addresses outside MCU
Port Replacement Registers
Port Replacement Unit
External emulation memory
CPU or BDM or XGATE
5.1.2 Features
The XEBI includes the following features:
• Output of up to 23-bit address bus and control signals to be used with a non-muxed external bus
• Bidirectional 16-bit external data bus with option to disable upper half
• Visibility of internal bus activity
5.1.3 Modes of Operation
• Single-chip modes
The external bus interface is not available in these modes.
• Expanded modes
Address, data, and control signals are activated on the external bus in normal expanded mode and
special test mode.
• Emulation modes
The external bus is activated to interface to an external tool for emulation of normal expanded mode
or normal single-chip mode applications.
MC9S12XE-Family Reference Manual Rev. 1.25
242
Freescale Semiconductor