S912XEG128J2MAA Datasheet, PDF (108/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.3 Port A Data Register (PORTA)
Address 0x0000 (PRR)
Access: User read/write⁽¹⁾
7
6
5
4
3
2
1
0
R
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
W
Altern.
Function
ADDR15
mux
IVD15
ADDR14
mux
IVD14
ADDR13
mux
IVD13
ADDR12
mux
IVD12
ADDR11
mux
IVD11
ADDR10
mux
IVD10
ADDR9
mux
IVD9
ADDR8
mux
IVD8
Reset
0
0
0
0
0
0
0
0
Figure 2-1. Port A Data Register (PORTA)
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
Field
7-0
PA
Table 2-4. PORTA Register Field Descriptions
Description
Port A general purpose input/output data—Data Register
Port A pins 7 through 0 are associated with address outputs ADDR[15:8] respectively in expanded modes. In
emulation modes the address is multiplexed with IVD[15:8].
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
2.3.4 Port B Data Register (PORTB)
Address 0x0001 (PRR)
Access: User read/write⁽¹⁾
7
R
PB7
W
6
PB6
5
PB5
4
PB4
3
PB3
2
PB2
1
PB1
0
PB0
Altern.
Function
ADDR7
mux
IVD7
ADDR6
mux
IVD6
ADDR5
mux
IVD5
ADDR4
mux
IVD4
ADDR3
mux
IVD3
ADDR2
mux
IVD2
ADDR1
mux
IVD1
ADDR0
mux
IVD0
or
UDS
Reset
0
0
0
0
0
0
0
0
Figure 2-2. Port B Data Register (PORTB)
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
MC9S12XE-Family Reference Manual Rev. 1.25
108
Freescale Semiconductor