S912XEG128J2MAA Datasheet, PDF (1274/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix E Detailed Register Address Map
0x0030–0x0031 Reserved Register Space
R
0
0
0
0
0
0
0
0
0x0030 Reserved
W
R
0
0
0
0
0
0
0
0
0x0031 Reserved
W
0x0032–0x0033 Port Integration Module (PIM) Map 4 of 6
Address
0x0032
0x0033
Name
PORTK
DDRK
Bit 7
R
PK7
W
R
DDRK7
W
Bit 6
PK6
DDRK6
Bit 5
PK5
DDRK5
Bit 4
PK4
DDRK4
Bit 3
PK3
DDRK3
Bit 2
PK2
DDRK2
Bit 1
PK1
DDRK1
Bit 0
PK0
DDRK0
0x0034–0x003F Clock and Reset Generator (CRG) Map
Address
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003A
0x003B
0x003C
0x003D
0x003E
0x003F
Name
SYNR
REFDV
POSTDIV
CRGFLG
CRGINT
CLKSEL
PLLCTL
RTICTL
COPCTL
FORBYP
CTCTL
ARMCOP
Bit 7
Bit 6
R
VCOFRQ[1:0]
W
R
REFFRQ[1:0]
W
R0
0
W
R
RTIF
W
PORF
R
0
RTIE
W
R
PLLSEL
W
PSTP
R _CME
W
R
RTDEC
W
PLLON
RTR6
R
WCOP
W
RSBCK
R
0
0
W
R
0
0
W
R
0
0
W Bit 7
6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SYNDIV5 SYNDIV4 SYNDIV3 SYNDIV2 SYNDIV1 SYNDIV0
REFDIV5 REFDIV4 REFDIV3 REFDIV2 REFDIV1 REFDIV0
0
POSTDIV[4:0]]
LVRF
LOCKIF
LOCK
SCM
ILAF
SCMIF
0
0
LOCKIE
0
0
SCMIE
XCLKS
0
0
PLLWAI
RTIWAI COPWAI
FM1
FM0 FSTWKP PRE
PCE
SCME
RTR5
RTR4
RTR3
RTR2
0
0
WRTMASK
0
CR2
0
0
0
0
Reserved For Factory Test
0
0
0
Reserved For Factory Test
0
0
0
0
5
4
3
2
RTR1
CR1
0
0
0
1
RTR0
CR0
0
0
0
Bit 0
1274
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor