S912XEG128J2MAA Datasheet, PDF (129/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

2.3.35
Chapter 2 Port Integration Module (S12XEPIMV1)
Port S Wired-Or Mode Register (WOMS)
Address 0x024E
R
W
Reset
7
WOMS7
0
1. Read: Anytime.
Write: Anytime.
6
WOMS6
5
WOMS5
4
WOMS4
3
WOMS3
2
WOMS2
0
0
0
0
0
Figure 2-33. Port S Wired-Or Mode Register (WOMS)
Access: User read/write⁽¹⁾
1
0
WOMS1
WOMS0
0
0
Table 2-32. WOMS Register Field Descriptions
Field
Description
7-0
WOMS
Port S wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or independent of the function used on the pins. If enabled the
output is driven active low only (open-drain). A logic level of “1” is not driven.This allows a multipoint connection of
several serial modules. These bits have no influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.
2.3.36 PIM Reserved Register
Address 0x024F
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
1. Read: Always reads 0x00
Write: Unimplemented
Figure 2-34. PIM Reserved Register
Access: User read⁽¹⁾
1
0
0
0
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
129