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| S912XEG128J2MAA Datasheet, PDF (820/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 23 Voltage Regulator (S12VREGL3V3V1)
23.3.1 Module Memory Map
A summary of the registers associated with the VREG_3V3 sub-block is shown in Figure 23-2. Detailed
descriptions of the registers and bits are given in the subsections that follow
Figure 23-2. Register Summary
Address Name
R
0x02F0 VREGHTCL
W
Bit 7
0
6
5
4
3
2
1
Bit 0
0
HTDS
VSEL
VAE
HTEN
HTIE
HTIF
R
0
0
0x02F1 VREGCTRL
W
0x02F2
VREGAPIC R
L
W
APICLK
0
0
0
0
LVDS
LVIE
LVIF
0
APIFES APIEA APIFE
APIE
APIF
0x02F3
VREGAPIT R
R
W
APITR5
APITR4
APITR3
APITR2
APITR1
APITR0
0
0
0x02F4
VREGAPIR R
H
W
APIR15
APIR14
APIR13
APIR12
APIR11
APIR10
APIR9
APIR8
0x02F5
VREGAPIR R
L
W
APIR7
APIR6
APIR5
APIR4
APIR3
APIR2
APIR1
APIR0
0x02F6
Reserved R
06
W
0
0
0
0
0
0
0
0
R
0
0
0
0x02F7 VREGHTTR
HTOEN
HTTR3 HTTR2 HTTR1 HTTR0
W
23.3.2 Register Descriptions
This section describes all the VREG_3V3 registers and their individual bits.
23.3.2.1 High Temperature Control Register (VREGHTCL)
The VREGHTCL register allows to conï¬gure the VREG temperature sense features.
0x02F0
7
R
0
W
6
5
4
3
2
1
0
0
HTDS
VSEL
VAE
HTEN
HTIE
HTIF
Reset
0
0
0
1
0
0
0
0
= Unimplemented or Reserved
MC9S12XE-Family Reference Manual Rev. 1.25
820
Freescale Semiconductor
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