S912XEG128J2MAA Datasheet, PDF (1273/1324 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix E Detailed Register Address Map
0x001E–0x001F Port Integration Module (PIM) Map 3 of 6
Address Name
Bit 7
0x001E
0x001F
IRQCR
R
IRQE
W
R
0
Reserved
W
Bit 6
IRQEN
0
Bit 5
0
0
Bit 4
0
0
Bit 3
0
0
Bit 2
0
0
Bit 1
0
0
Bit 0
0
0
0x0020–0x0027 Debug Module (S12XDBG) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
0x0020
DBGC1
R
ARM
W
0
TRIG
XGSBPE
BDM
DBGBRK
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0027
0x0028
(1)
R
DBGSR
W
R
DBGTCR
W
R
DBGC2
W
R
DBGTBH
W
R
DBGTBL
W
R
DBGCNT
W
R
DBGSCRX
W
R
DBGMFR
W
DBGXCTL R
(COMPA/C) W
TBF
EXTF
TSOURCE
0
0
Bit 15
Bit 14
Bit 7
Bit 6
0
0
0
0
0
0
NDB
0
0
TRANGE
0
0
Bit 13
Bit 12
Bit 5
Bit 4
0
0
0
0
TAG
BRK
0
SSF2
TRCMOD
CDCM
Bit 11
Bit 10
Bit 3
Bit 2
CNT
SC3
MC3
SC2
MC2
RW
RWE
0x0028 DBGXCTL ^R
(2)
(COMPB/D) W
SZE
SZ
TAG
BRK
RW
RWE
R
0
0x0029 DBGXAH
Bit 22
21
20
19
18
W
R
0x002A DBGXAM
Bit 15
14
13
12
11
10
W
R
0x002B DBGXAL
Bit 7
6
5
4
3
2
W
R
0x002C DBGXDH
Bit 15
14
13
12
11
10
W
R
0x002D DBGXDL
Bit 7
6
5
4
3
2
W
R
0x002E DBGXDHM
Bit 15
14
13
12
11
10
W
R
0x002F DBGXDLM
Bit 7
6
5
4
3
2
W
1. This represents the contents if the Comparator A or C control register is blended into this address
2. This represents the contents if the Comparator B or D control register is blended into this address
Bit 1
Bit 0
COMRV
SSF1
SSF0
TALIGN
ABCM
Bit 9
Bit 8
Bit 1
Bit 0
SC1
MC1
SC0
MC0
SRC
SRC
17
9
1
9
1
9
1
COMPE
COMPE
Bit 16
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1273