MC68HC708MP16 Datasheet, PDF (84/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
Addr.
Name
Bit 7 6
5
4
3
$FE00
SIM Break Status Register ^Read:
(SBSR) _Write:
R
R
R
R
R
Note: Writing a logic 0 clears SBSW. Reset:
Read: POR PIN COP ILOP
ILAD
$FE01
SIM Reset Status Register
(SRSR)
Write:
Reset: 1
0
0
0
0
Read:
$FE03
SIM Break Flag Control
Register (SBFCR)
Write:
BCFE
R
R
R
R
Reset: 0
2
1 Bit 0
SBSW
R
R
Note
0
0
LVI
0
0
0
0
R
R
R
Figure 7-2. SIM I/O Register Summary
Table 7-1 shows the internal signal names used in this section.
Table 7-1. Signal Name Conventions
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
IAB
IDB
PORRST
IRST
R/W
Description
Buffered version of OSC1 from clock generator module (CGM)
PLL output
PLL-based or OSC1-based clock output from CGM module
(Bus clock = CGMOUT divided by two)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Technical Data
84
System Integration Module (SIM)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor