MC68HC708MP16 Datasheet, PDF (44/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
Name
Bit 7
$0014
Timer A Channel 1 Status and ^Read:
Control Register (TASC1) Write:
See page 223. _Reset:
CH1F
0
0
$0015
Timer A Channel 1 Register ^Read:
High (TACH1H) Write:
See page 223. _Reset:
Bit 15
$0016
Timer A Channel 1 Register ^Read: _{Bit 7}
Low (TACH1L) Write:
See page 223. _Reset:
$0017
Read: _COCO/
ADC Status and Control
Register (ADSCR)
Write:
IDMAS
Reset: 0
$0018
Read:
Unimplemented
Write:
6
CH1IE
0
14
6
AIEN
0
5
4
3
2
1 Bit 0
0
MS1A ELS1B ELS1A TOV1 CH1MAX
0
0
0
0
0
0
13
12
11
10
9
Bit 8
Indeterminate after reset
5
4
3
2
1
Bit 0
Indeterminate after reset
ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
0
0
0
0
0
0
$0019
ADC Data Register ^{Read: AD7}
AD6
AD5
AD4
AD3
AD2 AD1
(ADR) Write:
See page 363. _{Reset: 0}
0
0
0
0
0
0
$001A
ADC Clock Register ^Read: _{ADIV2 ADIV1 ADIV0 ADCLK}
0
(ADCLK) Write:
See page 363. _{Reset: 0}
0
0
0
0
0
0
0
0
$001B
SPI Control Register ^Read:
(SPCR) Write:
See page 277. _Reset:
SPRIE
0
DMAS
0
SPMSTR
1
CPOL
0
CPHA SPWOM SPE
1
0
0
$001C
SPI Status and Control ^Read:
Register (SPSCR) Write:
See page 279. _Reset:
SPRF
0
ERRIE
0
OVRF
0
MODF
0
SPTE
MODFEN SPR1
1
0
0
$001D
SPI Data Register ^{Read: R7}
R6
R5
R4
R3
R2
R1
(SPDR) Write: T7
T6
T5
T4
T3
T2
T1
See page 282. _Reset:
Indeterminate after reset
X = Indeterminate U = Unaffected
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 9)
AD0
0
0
0
SPTIE
0
SPR0
0
R0
T0
Technical Data
44
Memory Map
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor