MC68HC708MP16 Datasheet, PDF (262/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
BUS
CLOCK
WRITE
TO SPDR
INITIATION DELAY
MOSI
SPSCK
(CPHA = 1)
SPSCK
(CPHA = 0)
SPSCK CYCLE
NUMBER
MSB
BIT 6
BIT 5
1
2
3
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
BUS
CLOCK
WRITE
TO SPDR
BUS
CLOCK
EARLIEST LATEST
WRITE
TO SPDR
(SPSCK = INTERNAL CLOCK ÷ 2;
2 POSSIBLE START POINTS)
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
(SPSCK = INTERNAL CLOCK ÷ 8;
8 POSSIBLE START POINTS)
LATEST
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
(SPSCK = INTERNAL CLOCK ÷ 32;
32 POSSIBLE START POINTS)
LATEST
EARLIEST
(SPSCK = INTERNAL CLOCK ÷ 128;
128 POSSIBLE START POINTS)
LATEST
Figure 13-7. Transmission Start Delay (Master)
Technical Data
262
Serial Peripheral Interface Module (SPI)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor