MC68HC708MP16 Datasheet, PDF (183/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.11.9 Fault Status Register
This read-only register indicates the current fault status.
Address: $0023
Bit 7
Read: FPIN4
6
FFLAG4
5
FPIN3
4
FFLAG3
3
FPIN2
2
FFLAG2
1
FPIN1
Write:
Reset: U
0
U
0
U
0
U
= Unimplemented
U = Unaffected
Figure 9-48. Fault Status Register (FSR)
Bit 0
FFLAG1
0
FFLAG1 — Fault Event Flag 1
The FFLAG1 event bit is set within two CPU cycles after a rising edge
on fault pin 1. To clear the FFLAG1 bit, the user must write a 1 to the
FTACK1 bit in the fault acknowledge register.
1 = A fault has occurred on fault pin 1
0 = No new fault on fault pin 1
FPIN1 — State of Fault Pin 1
This read-only bit allows the user to read the current state of fault
pin 1.
1 = Fault pin 1 is at logic 1
0 = Fault pin 1 is at logic 0
FFLAG2 — Fault Event Flag 2
The FFLAG2 event bit is set within two CPU cycles after a rising edge
on fault pin 2. To clear the FFLAG2 bit, the user must write a 1 to the
FTACK2 bit in the fault acknowledge register.
1 = A fault has occurred on fault pin 2
0 = No new fault on fault pin 2
FPIN2 — State of Fault Pin 2
This read-only bit allows the user to read the current state of fault
pin 2.
1 = Fault pin 2 is at logic 1
0 = Fault pin 2 is at logic 0
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor Pulse Width Modulator for Motor Control (PWMMC)
Technical Data
183