MC68HC708MP16 Datasheet, PDF (111/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Clock Generator Module (CGM)
8.4.2.4 Programming the PLL
The following procedure shows how to program the PLL.
NOTE: The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f_BUSDES.
2. Calculate the desired VCO frequency (four times the desired bus
frequency).
= f _{V C L K D E S}
4 × f_BUSDES
3. Choose a practical PLL reference frequency, f_RCLK.
4. Select a VCO frequency multiplier, N.
N
=
r
o
u
n
d


f--_{V---fC--R--L-C-K--L-D--K-E---S- }
5. Calculate and verify the adequacy of the VCO and bus
frequencies f_VCLK and f_BUS.
f_VCLK = N × f_RCLK
f_BUS = (f_VCLK) ⁄ 4
6. Select a VCO linear range multiplier, L.
L = round_^f-f-V-_N--^C-_O---^L-_M-^K-_
where f_NOM = 4.9152 MHz
7. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency f_VRS.
f_VRS = (L)f_NOM
8. Verify the choice of N and L by comparing f_VCLK to f_VRS and
f_VCLKDES. For proper operation, f_VCLK must be within the
application’s tolerance of f_VCLKDES, and f_VRS must be as close as
possible to f_VCLK.
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor
Clock Generator Module (CGM)
Technical Data
111