MC68HC708MP16 Datasheet, PDF (178/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
LDFQ1:LDFQ0 — PWM Load Frequency Bits
These buffered read/write bits select the PWM CPU load frequency
according to Table 9-9.
NOTE: When reading these bits, the value read is the buffer value (not
necessarily the value the PWM generator is currently using).
Table 9-9. PWM Reload Frequency
Reload Frequency Bits
LDFQ1:LDFQ0
00
01
10
11
PWM Reload Frequency
Every PWM cycle
Every 2 PWM cycles
Every 4 PWM cycles
Every 8 PWM cycles
IPOL1 — Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
This buffered read/write bit selects which PWM value register is used
if top/bottom correction is to be achieved without current sensing.
1 = Use PWM value register 2
0 = Use PWM value register 1
NOTE: When reading this bit, the value read is the buffer value (not necessarily
the value the output control block is currently using).
IPOL2 — Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
This buffered read/write bit selects which PWM value register is used
if top/bottom correction is to be achieved without current sensing.
1 = Use PWM value register 4
0 = Use PWM value register 3
NOTE: When reading this bit, the value read is the buffer value (not necessarily
the value the output control block is currently using).
IPOL3 — Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
This buffered read/write bit selects which PWM value register is used
if top/bottom correction is to be achieved without current sensing.
1 = Use PWM value register 6
0 = Use PWM value register 5
Technical Data
178
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor