MC68HC708MP16 Datasheet, PDF (357/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog-to-Digital Converter (ADC)
19.4.4 Continous Conversion
In the continuous conversion mode, the ADC data register will be filled
with new data after each conversion. Data from the previous conversion
will be overwritten whether that data has been read or not. Conversions
will continue until the ADCO bit is cleared. The COCO bit is set after the
first conversion and will stay set for the next several conversions until the
next write of the ADC status and control register or the next read of the
ADC data register.
19.4.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes.
19.5 Interrupts
When the AIEN bit is set, the ADC module is capable of generating either
CPU or DMA interrupt after each ADC conversion. A CPU interrupt is
generated if the COCO/IDMAS bit is at logic 0. If COCO/IDMAS bit is set,
a DMA interrupt is generated. The COCO/IDMAS bit is not used as a
conversion complete flag when interrupts are enabled.
19.6 Wait Mode
The WAIT instruction can put the MCU in low-power-consumption
standby mode.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting ADCH[4:0] bits in the ADC status and
Control Register before executing the WAIT instruction.
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor
Analog-to-Digital Converter (ADC)
Technical Data
357