MC68HC708MP16 Datasheet, PDF (43/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
Name
Bit 7 6
5
4
3
2
1 Bit 0
$000A
Data Direction Register E ^Read: _DDRE7
(DDRE) Write:
See page 329. _{Reset: 0}
DDRE6
0
DDRE5
0
DDRE4
0
DDRE3
0
DDRE2 DDRE1 DDRE0
0
0
0
$000B
Data Direction Register F ^{Read: 0}
(DDRF) Write:
See page 331. _{Reset: 0}
0
DDRF5 DDRF4 DDRF3 DDRF2 DDRF1 DDRF0
0
0
0
0
0
0
0
Timer A Status and Control Read: TOF
0
0
$000C
Register (TASC)
See page 215.
Write:
0
TOIE TSTOP
TRST
Reset: 0
0
1
0
0
PS2 PS1 PS0
0
0
0
Timer A Counter Register High ^{Read: Bit 15}
14
13
12
11
10
9
Bit 8
$000D
(TACNTH) Write:
See page 217. _{Reset: 0}
0
0
0
0
0
0
0
Timer A Counter Register Low ^{Read: Bit 7}
6
5
4
3
2
1
Bit 0
$000E
(TACNTL) Write:
See page 217. _{Reset: 0}
0
0
0
0
0
0
0
Timer A Modulo Register High ^Read: _{Bit 15}
14
13
12
11
10
9
Bit 8
$000F
(TAMODH) Write:
See page 218. _{Reset: 1}
1
1
1
1
1
1
1
Timer A Modulo Register Low ^Read: _{Bit 7}
6
5
4
3
2
1
Bit 0
$0010
(TAMODL) Write:
See page 218. _{Reset: 1}
1
1
1
1
1
1
1
$0011
Timer A Channel 0 Status and ^Read:
Control Register (TASC0) Write:
See page 219. _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B
0
ELS0A TOV0 CH0MAX
0
0
0
Timer A Channel 0 Register ^Read: _{Bit 15}
14
$0012
High (TACH0H) Write:
See page 223. _Reset:
13
12
11
10
Indeterminate after reset
9
Bit 8
Timer A Channel 0 Register ^Read: _{Bit 7}
6
$0013
Low (TACH0L) Write:
See page 223. _Reset:
5
4
3
2
Indeterminate after reset
1
Bit 0
X = Indeterminate U = Unaffected
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 9)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor
Memory Map
Technical Data
43