MC68HC708MP16 Datasheet, PDF (248/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module B (TIMB)
OVERFLOW
OVERFLOW
PERIOD
PTEx/TCHxB
OVERFLOW
OVERFLOW
OVERFLOW
CHxMAX
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 12-8. CHxMAX Latency
12.9.5 TIMB Channel Registers
These read/write registers contain the captured TIMB counter value of
the input capture function or the output compare value of the output
compare function. The state of the TIMB channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIMB channel x registers (TBCHxH) inhibits input captures until the low
byte (TBCHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of
the TIMB channel x registers (TBCHxH) inhibits output compares until
the low byte (TBCHxL) is written.
TBCH0H
$0045 Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
Write:
13
12
11
10
9
Bit 8
Reset:
Indeterminate after reset
TBCH0L
$0046 Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Indeterminate after reset
Figure 12-9. TIMB Channel Registers
(TBCH0H/L:TBCH3H/L)
Technical Data
248
Timer Interface Module B (TIMB)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor