MC68HC708MP16 Datasheet, PDF (185/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.11.10 Fault Acknowledge Register
This register is used to acknowledge and clear the FFLAGs. In addition,
it is used to monitor the current sensing bits to test proper operation.
Address: $0024
Bit 7
6
5
4
3
2
1
Read: 0
0
DT6
DT5
DT4
DT3
DT2
Write:
FTACK4
FTACK3
FTACK2
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 9-49. Fault Acknowledge Register (FTACK)
Bit 0
DT1
FTACK1
0
FTACK1 — Fault Acknowledge 1
The FTACK1 bit is used to acknowledge and clear FFLAG1. This bit
will always read 0. Writing a 1 to this bit will clear FFLAG1. Writing a
0 will have no effect.
FTACK2 — Fault Acknowledge 2
The FTACK2 bit is used to acknowledge and clear FFLAG2. This bit
will always read 0. Writing a 1 to this bit will clear FFLAG2. Writing a
0 will have no effect.
FTACK3 — Fault Acknowledge 3
The FTACK3 bit is used to acknowledge and clear FFLAG3. This bit
will always read 0. Writing a 1 to this bit will clear FFLAG3. Writing a
0 will have no effect.
FTACK4 — Fault Acknowledge 4
The FTACK4 bit is used to acknowledge and clear FFLAG4. This bit
will always read 0. Writing a 1 to this bit will clear FFLAG4. Writing a
0 will have no effect.
DT1 — Dead Time 1
Current sensing pin IS1 is monitored immediately before dead time
ends due to the assertion of PWM1.
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor Pulse Width Modulator for Motor Control (PWMMC)
Technical Data
185