MC68HC708MP16 Datasheet, PDF (168/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.7.2 Software Output Disable
Setting PWM disable bit DISX or DISY in PWM control register 1
immediately disables the corresponding PWM pins as determined by the
bank and disable mapping register. The PWM pin(s) remain disabled
until the PWM disable bit is cleared and a new PWM cycle begins as
shown in Figure 9-38. Setting a PWM disable bit does not latch a CPU
interrupt request, and there are no event flags associated with the PWM
disable bits.
9.7.3 Output Port Control
When operating the PWMs using the OUTx bits (OUTCTL = 1), fault
protection applies as described in this section. Due to the absence of
periodic PWM cycles, fault conditions are cleared upon each CPU cycle
and the PWM outputs are re-enabled, provided all fault clearing
conditions are satisfied.
DISABLE BIT
PWM(S) ENABLED
PWM(S) DISABLED
PWM(S) ENABLED
Figure 9-38. PWM Software Disable
Technical Data
168
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor