MC68HC708MP16 Datasheet, PDF (158/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.6.5 Output Port Control
Conditions may arise in which the PWM pins need to be individually
controlled. This is made possible by the PWM output control register
(PWMOUT) shown in Figure 9-28.
$0025 Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
OUTCTL OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-28. PWM Output Control Register (PWMOUT)
If the OUTCTL bit is set, the PWM pins can be controlled by the OUTx
bits. These bits behave according to Table 9-7.
Table 9-7. OUTx Bits
OUTx Bit
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
Complementary Mode
1 — PWM1 is active
0 — PWM1 is inactive
1 — PWM2 is complement of PWM 1
0 — PWM2 is inactive
1 — PWM3 is active
0 — PWM3 is inactive
1 — PWM4 is complement of PWM 3
0 — PWM4 is inactive
1 — PWM5 is active
0 — PWM5 is inactive
1 — PWM 6 is complement of PWM 5
0 — PWM6 is inactive
Independent Mode
1 — PWM1 is active
0 — PWM1 is inactive
1 — PWM2 is active
0 — PWM2 is inactive
1 — PWM3 is active
0 — PWM3 is inactive
1 — PWM4 is active
0 — PWM4 is inactive
1 — PWM5 is active
0 — PWM5 is inactive
1 — PWM6 is active
0 — PWM6 is inactive
When OUTCTL is set, the polarity options TOPPOL and BOTPOL will
still affect the outputs. In addition, if complementary operation is in use,
the PWM pairs will not be allowed to be active simultaneously, and dead-
time will still not be violated. When OUTCTL is set and complimentary
operation is in use, the odd OUTx bits are inputs to the dead-time
generators as shown in Figure 9-13. Dead-time is inserted whenever
Technical Data
158
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor