MC68HC708MP16 Datasheet, PDF (170/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
CPU CLOCK
PWMEN
PWM PINS
HI-Z IF OUTCTL = 0
DRIVE ACCORDING TO PWM
VALUE, POLARITY, AND DEAD-TIME
HI-Z IF OUTCTL = 0
Figure 9-39. PWMEN and PWM Pins
When the PWMEN bit is cleared, the following will occur:
• PWM pins will be tri-stated unless OUTCTL = 1
• PWM counter is cleared and will not be clocked
• Internally, the PWM generator will force its outputs to zero (to
avoid glitches when the PWMEN is set again)
When PWMEN is cleared, the following features remain active:
• All fault circuitry
• Manual PWM pin control via the PWMOUT register
• Dead-time insertion when PWM pins change via the PWMOUT
register
NOTE: The PWMF flag and pending CPU interrupts are NOT cleared when
PWMEN = 0.
Technical Data
170
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor