MC68HC708MP16 Datasheet, PDF (240/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module B (TIMB)
12.9.1 TIMB Status and Control Register
The TIMB status and control register does the following:
• Enables TIMB overflow interrupts
• Flags TIMB overflows
• Stops the TIMB counter
• Resets the TIMB counter
• Prescales the TIMB counter clock
Address: $003F
Bit 7
6
5
4
3
Read: TOF
0
0
TOIE TSTOP
Write:
0
TRST
2
1
Bit 0
PS2
PS1
PS0
Reset: 0
0
1
0
0
0
0
0
= Unimplemented
Figure 12-4. TIMB Status and Control Register (TBSC)
TOF — TIMB Overflow Flag Bit
This read/write flag is set when the TIMB counter resets to $0000 after
reaching the modulo value programmed in the TIMB counter modulo
registers. Clear TOF by reading the TIMB status and control register
when TOF is set and then writing a logic 0 to TOF. If another TIMB
overflow occurs before the clearing sequence is complete, then
writing logic 0 to TOF has no effect. Therefore, a TOF interrupt
request cannot be lost due to inadvertent clearing of TOF. Reset
clears the TOF bit. Writing a logic 1 to TOF has no effect.
1 = TIMB counter has reached modulo value
0 = TIMB counter has not reached modulo value
TOIE — TIMB Overflow Interrupt Enable Bit
This read/write bit enables TIMB overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
1 = TIMB overflow interrupts enabled
0 = TIMB overflow interrupts disabled
Technical Data
240
Timer Interface Module B (TIMB)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor