MC68HC708MP16 Datasheet, PDF (181/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
FINT1 — Fault 1 Interrupt Enable
This read/write bit allows the CPU interrupt caused by faults on fault
pin 1 to be enabled. The fault protection circuitry is independent of this
bit and will always be active. If a fault is detected, the PWM pins will
still be disabled according to the disable mapping register.
1 = Fault pin 1 will cause CPU interrupts
0 = Fault pin 1 will not cause CPU interrupts
FMODE2 — Fault Mode Selection for Fault Pin 2 (Automatic versus
Manual Mode)
This read/write bit allows the user to select between automatic and
manual mode faults. For further description of each mode, see 9.7
Fault Protection.
1 = Automatic mode
0 = Manual mode
FINT2 — Fault 2 Interrupt Enable
This read/write bit allows the CPU interrupt caused by faults on fault
pin 2 to be enabled. The fault protection circuitry is independent of this
bit and will always be active. If a fault is detected, the PWM pins will
still be disabled according to the disable mapping register.
1 = Fault pin 2 will cause CPU interrupts
0 = Fault pin 2 will not cause CPU interrupts
FMODE3 — Fault Mode Selection for Fault Pin 3 (Automatic versus
Manual Mode)
This read/write bit allows the user to select between automatic and
manual mode faults. For further description of each mode, see 9.7
Fault Protection.
1 = Automatic mode
0 = Manual mode
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor Pulse Width Modulator for Motor Control (PWMMC)
Technical Data
181