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MC68HC708MP16 Datasheet, PDF (356/398 Pages) Freescale Semiconductor, Inc – Microcontrollers
Analog-to-Digital Converter (ADC)
19.4.1 ADC Port I/O Pins
PTC1/ATD9:PTC0/ATD8 and PTB7/ATD7:PTB0/ATD0 are general-
purpose I/O pins that are shared with the ADC channels.
The channel select bits define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0.
19.4.2 Voltage Conversion
NOTE:
When the input voltage to the ADC equals VDDAD, the ADC converts the
signal to $FF (full scale). If the input voltage equals VSSAD, the ADC
converts it to $00. Input voltages between VDDAD and VSSAD are straight-
line linear conversions. All other input voltages will result in $FF if greater
than VDDAD and $00 if less than VSSAD.
Input voltage should not exceed the analog supply voltages.
19.4.3 Conversion Time
Conversion starts after a write to the ADSCR. Conversion time in terms
of the number of bus cycles is a function of oscillator frequency, bus
frequency, and ADIV prescaler bits. For example, with an oscillator
frequency of 8 MHz, a bus frequency of 4 MHz, and an ADC clock
frequency of 1 MHz, one conversion will take between 16 ADC and 17
ADC clock cycles or between 16 and 17 µs. There will be 128 bus cycles
between each conversion. Sample rate is approximately 30 kHz.
Conversion Time = 16-17 ADC Cycles
ADC Frequency
Number of Bus Cycles = Conversion Time x Bus Frequency
Technical Data
356
Analog-to-Digital Converter (ADC)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor