MC68HC708MP16 Datasheet, PDF (135/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.4 Timebase
Refer to the following subsections for a discussion of the timebase.
9.4.1 Resolution
In center-aligned mode, a 12-bit up/down counter is used to create the
PWM period. Therefore, the PWM resolution in center-aligned mode is
two clocks (highest resolution is 250 ns @ f_op = 8 MHz) as shown in
Figure 9-3. The up/down counter uses the value in the timer modulus
register to determine its maximum count. The PWM period will equal:
[(timer modulus) x (PWM clock period) x 2].
UP/DOWN COUNTER
MODULUS = 4
PWM = 0
PWM = 1
PWM = 2
PERIOD = 8 x (PWM CLOCK PERIOD)
PWM = 3
PWM = 4
Figure 9-3. Center-Aligned PWM (Positive Polarity)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor Pulse Width Modulator for Motor Control (PWMMC)
Technical Data
135