MC68HC708MP16 Datasheet, PDF (184/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
FFLAG3 — Fault Event Flag 3
The FFLAG3 event bit is set within two CPU cycles after a rising edge
on fault pin 3. To clear the FFLAG3 bit, the user must write a 1 to the
FTACK3 bit in the fault acknowledge register.
1 = A fault has occurred on fault pin 3
0 = No new fault on fault pin 3
FPIN3 — State of Fault Pin 3
This read-only bit allows the user to read the current state of fault
pin 3.
1 = Fault pin 3 is at logic 1
0 = Fault pin 3 is at logic 0
FFLAG4 — Fault Event Flag 4
The FFLAG4 event bit is set within two CPU cycles after a rising edge
on fault pin 4. To clear the FFLAG4 bit, the user must write a 1 to the
FTACK4 bit in the fault acknowledge register.
1 = A fault has occurred on fault pin 4
0 = No new fault on fault pin 4
FPIN4 — State of Fault Pin 4
This read-only bit allows the user to read the current state of fault
pin 4.
1 = Fault pin 4 is at logic 1
0 = Fault pin 4 is at logic 0
Technical Data
184
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor