MC68HC708MP16 Datasheet, PDF (304/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Communications Interface Module (SCI)
14.8.2 SCI Control Register 2
SCI control register 2:
• Enables the following CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt
requests
– Enables the TC bit to generate transmitter CPU interrupt
requests
– Enables the SCRF bit to generate receiver CPU interrupt
requests
– Enables the IDLE bit to generate receiver CPU interrupt
requests
• Enables the transmitter
• Enables the receiver
• Enables SCI wake-up
• Transmits SCI break characters
Address: $0039
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SCTIE TCIE SCRIE ILIE
TE
RE
RWU
SBK
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 14-8. SCI Control Register 2 (SCC2)
SCTIE — SCI Transmit Interrupt Enable Bit
This read/write bit enables the SCTE bit to generate SCI transmitter
CPU interrupt requests. Setting the SCTIE bit in SCC3 enables SCTE
CPU interrupt requests. Reset clears the SCTIE bit.
1 = SCTE enabled to generate CPU interrupt
0 = SCTE not enabled to generate CPU interrupt
Technical Data
304
MC68HC708MP16 — Rev. 3.1
Serial Communications Interface Module (SCI)
Freescale Semiconductor