MC68HC708MP16 Datasheet, PDF (388/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Glossary
I — The interrupt mask bit in the condition code register of the CPU08.
When I is set, all interrupts are disabled.
index register (H:X) — A 16-bit register in the CPU08. The upper byte
of H:X is called H. The lower byte is called X. In the indexed
addressing modes, the CPU uses the contents of H:X to determine
the effective address of the operand. H:X can also serve as a
temporary data storage location.
input/output (I/O) — Input/output interfaces between a computer
system and the external world. A CPU reads an input to sense the
level of an external signal and writes to an output to change the level
on an external signal.
instructions — Operations that a CPU can perform. Instructions are
expressed by programmers as assembly language mnemonics. A
CPU interprets an opcode and its associated operand(s) and
instruction.
interrupt — A temporary break in the sequential execution of a program
to respond to signals from peripheral devices by executing a
subroutine.
interrupt request — A signal from a peripheral to the CPU intended to
cause the CPU to execute a subroutine.
I/O — See input/output (I/0).
IRQ — See external interrupt module (IRQ).
jitter — Short-term signal instability.
latch — A circuit that retains the voltage level (logic 1 or logic 0) written
to it for as long as power is applied to the circuit.
latency — The time lag between instruction completion and data
movement.
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage
(V_DD).
Technical Data
388
Glossary
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor