MC68HC708MP16 Datasheet, PDF (221/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module A (TIMA)
When ELSxB:A = 00, this read/write bit selects the initial output level
of the TCHx pin. (See Table 11-2.). Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMA status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E, and pin PTEx/TCHxA is available as a general-purpose I/O
pin. Table 11-2 shows how ELSxB and ELSxA work. Reset clears the
ELSxB and ELSxA bits.
Table 11-2. Mode, Edge, and Level Selection
MSxB:MSxA
X0
X1
00
00
00
01
01
01
1X
1X
1X
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Mode
Output
Preset
Input
Capture
Output
Compare
or PWM
Buffered
Output
Compare or
Buffered
PWM
Configuration
Pin under Port Control; Initial
Output Level High
Pin under Port Control; Initial
Output Level Low
Capture on Rising Edge Only
Capture on Falling Edge Only
Capture on Rising or Falling Edge
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor
Timer Interface Module A (TIMA)
Technical Data
221