MC68HC708MP16 Datasheet, PDF (175/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
9.11.4 PWM Control Register 1
PWM control register 1 controls PWM enabling/disabling, the loading of
new modulus, prescaler, and PWM values, and the PWM correction
method. In addition, this register contains the software disable bits to
force the PWM outputs to their inactive states (according to the disable
mapping register).
Address: $0020
Bit 7
6
5
4
3
2
1
Read:
Write:
DISX
0
DISY PWMINT PWMF ISENS1 ISENS0
LDOK
Reset: 0
0
0
0
0
0
0
Figure 9-43. PWM Control Register 1 (PCTL1)
Bit 0
PWMEN
0
PWMEN — PWM Module Enable
This read/write bit enables and disables the PWM generator and the
PWM pins. When PWMEN is clear, the PWM generator is disabled
and the PWM pins are in the high-impedance state (unless
OUTCTL = 1).
When the PWMEN bit is set, the PWM generator and PWM pins are
activated.
For more information, see 9.8 Initialization and the PWMEN Bit.
1 = PWM generator and PWM pins enabled
0 = PWM generator and PWM pins disabled
LDOK— Load OK
This write-only bit allows the counter modulus, counter prescaler, and
PWM values in the buffered registers to be used by the PWM
generator. These values will not be used until the LDOK bit is set and
a new PWM load cycle begins. Internally this bit is automatically
cleared after the new values are loaded (however, this bit always
reads zero).
1 = Okay to load new modulus, prescaler, and PWM values at
beginning of next PWM load cycle
0 = Not okay to load new modulus, prescaler, and PWM values
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor Pulse Width Modulator for Motor Control (PWMMC)
Technical Data
175