MC68HC708MP16 Datasheet, PDF (60/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Configuration Register (CONFIG)
5.3 Functional Description
The configuration register is a write-once register. Out of reset, the
configuration register will read all 0s. Once the register is written, further
writes will have no effect until a reset occurs.
NOTE:
If the LVI module and the LVI reset signal are enabled, a reset occurs
when V_DD falls to a voltage, LVI_TRIPF, and remains at or below that level
for at least nine consecutive CPU cycles. Once an LVI reset occurs, the
MCU remains in reset until V_DD rises to a voltage, LVI_TRIPR.
$001F Bit 7
6
5
4
3
2
1
Read:
EDGE BOTNEG TOPNEG INDEP
Write:
LVIRST LVIPWR
Bit 1
Reset: 0
0
0
0
0
0
0
Figure 5-1. Configuration Register (CONFIG)
Bit 0
COPD
0
EDGE — Edge-Align Enable Bit
EDGE determines if the motor control PWM will operate in edge-
aligned mode or center-aligned mode. (See Section 9. Pulse Width
Modulator for Motor Control (PWMMC).)
1 = Edge-aligned mode enabled
0 = Center-aligned mode enabled
BOTNEG — Bottom-Side PWM Polarity Bit
BOTNEG determines if the bottom-side PWMs will have positive or
negative polarity. (See Section 9. Pulse Width Modulator for Motor
Control (PWMMC).)
1 = Negative polarity
0 = Positive polarity
TOPNEG — Top-Side PWM Polarity Bit
TOPNEG determines if the top-side PWMs will have positive or
negative polarity. (See Section 9. Pulse Width Modulator for Motor
Control (PWMMC).)
1 = Negative polarity
0 = Positive polarity
Technical Data
60
Configuration Register (CONFIG)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor